Vutrax PCB CAD     
OpenOpenLatest Changes
OpenOpenSoftware Advice
OpenOpenOpenSAN Index
OpenOpenOpenSelected SAN
OpenOpenOpenSAN197 (Patches)
OpenBroadband Download
OpenIndividual Downloads
OpenMail & Contacts

VUTRAX Technical Support

          VUTRAX SOFTWARE ADVICE NOTICE 173 - 8 Dec 1997

                        VUTRAX 11 onwards

Advice on Optimising Signal Networks on double  sided  strips  of
                     components (e.g. SIMMs)


    VUTRAX offers numerous means of automatically optimising  the
    connection  network  of  a  signal. These include 'Network' -
    (spanning tree - shortest  routes),  ECL  sequenced,  Various
    styles  of sequential sweep across the board, Local swapping,
    and suppression (connections accepted in component order).

    After placement  the  DRAFT  'Optimise'  should  be  used  to
    re-sequence 'network' optimised signals. To re-sequence other
    types you need to [Analyse Placement] and generate a new rats
    nest.  All  forms of automatic optimisation use both sides of
    the board freely to minimise interconnection length.

    If the optimisation is not as you wish, a limited  number  of
    signals  is  most easily modified using [Disconnect Path] and
    [Reconnected Path] from (Reconnect).

Optimising Strips of components

    Designs with SM devices on both sides of  a  board  sometimes
    require  commonly  interconnected signals to run to a board's
    extremity before 'vias' take them through for connecting  the
    underside components. An example is a SIMM memory module.

    We suggest here a technique to obtain signal optimisation  in
    the appropriate style.

    Instead of initially placing components on  front  and  back,
    place  all component side components as normal but then place
    all solder side components in a continuing strip off the edge
    of  the board, as though you had opened out the board so that
    (nominally) component and solder sides are side by side.
    Now run Optimse on the design. The effect is to  ensure  that
    connections for the top/bottom connections run from one edge.
    Flip each solder side  component  and  place  it  behind  the
    component side design.
    So that this arrangements does not get subsequently destroyed
    by  the AUTOTRAK or VUROUTE router pre-route optimiser, clear
    the Network Optimisation and  Optimisation  Required  markers
    for all signals.
    The design can now be autorouted normally. 3rd party  routers
    may ignore optimisation limits unless you explicitly instruct
    the router otherwise.


    On Enquiries about optimisation techniques.
    Internet Site.